In input/output (IO) circuits, large diodes occupying great chip areas are needed for electro-static discharge (ESD) protection. For the ESD diodes, the ability to discharge ESD currents is partially determined by the sizes of the diodes. Accordingly, the diodes are designed as large as possible. Furthermore, required by design rules, the sizes of the anodes and cathodes of the diodes affect the widths of the metal lines directly over the respective anodes and cathodes. Accordingly, to gain good electro-migration performance of the metal lines directly over the diodes for robust ESD performance, the diodes are designed to have wide anode pickup regions and/or wide cathode pickup regions, rather than comprising many narrow anode pickup regions and/or narrow cathode pickup regions.
Since the ESD diodes are formed on the same chip/wafer as transistors, which comprise gate electrodes, ESD diodes need to have dummy gate electrodes formed thereon, so that the pattern density of the gate electrodes is substantially uniform across the entire wafer. Otherwise, the pattern loading effect may cause the degradation of the circuits. Design rules require that in any limited area (for example, 20 μm×20 μm or 10 μm×10 μm), the pattern density of dummy gate electrodes is greater than a specified value such as 10 percent. Such requirement is difficult to meet when wide anode pickup regions and/or wide cathode pickup regions are designed.